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[CUDA] Add SparsePagedAttention - #32524
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kunal-vaishnavi
September 10, 2026 06:35
kunal-vaishnavi
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September 10, 2026 06:39
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🟡 Changes recommended
A validation failure can occur after mutating the KV cache, and central sparse, quantized, and joint-softmax behaviors lack effective coverage.
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Pull request overview
Adds CUDA SparsePagedAttention for externally selected indices over paged or auxiliary KV caches.
Changes:
- Defines and registers the new contrib operator and symbolic shape inference.
- Implements CUDA cache preparation, sparse attention, quantization, and auxiliary-cache support.
- Adds CUDA tests and operator documentation.
File summaries
| File | Description |
|---|---|
onnxruntime/test/contrib_ops/sparse_paged_attention_op_test.cc |
Adds basic CUDA correctness tests. |
onnxruntime/python/tools/symbolic_shape_infer.py |
Registers symbolic inference. |
onnxruntime/core/graph/contrib_ops/ms_opset.h |
Registers the schema. |
onnxruntime/core/graph/contrib_ops/bert_defs.cc |
Defines the operator contract. |
onnxruntime/contrib_ops/cuda/cuda_contrib_kernels.cc |
Registers CUDA kernels. |
onnxruntime/contrib_ops/cuda/bert/sparse_paged_attention.h |
Declares the CUDA kernel class. |
onnxruntime/contrib_ops/cuda/bert/sparse_paged_attention.cc |
Validates inputs and dispatches execution. |
onnxruntime/contrib_ops/cuda/bert/sparse_paged_attention_impl.h |
Declares sparse implementation APIs. |
onnxruntime/contrib_ops/cuda/bert/sparse_paged_attention_impl.cu |
Implements sparse attention. |
onnxruntime/contrib_ops/cuda/bert/paged_attention_impl.h |
Exposes the shared cache prologue. |
onnxruntime/contrib_ops/cuda/bert/paged_attention_impl.cu |
Implements and instantiates that prologue. |
docs/OperatorKernels.md |
Documents CUDA kernel support. |
docs/ContribOperators.md |
Documents the generated schema. |
docs/contrib_ops/cuda/sparse_paged_attention.md |
Adds usage and support details. |
Review details
- Files reviewed: 14/14 changed files
- Comments generated: 5
- Review effort level: Balanced
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Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
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…sepagedattention Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
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Copilot review overview
🟡 Changes recommended
Cache-read correctness and launch/input validation defects can produce incorrect attention, mutate caches before failure, or crash the host.
Review effort: Balanced
Findings: 3
Open (3)
Resolved since last review (4)
physical_block * block_sizeis evaluated asintbefore the result is used in the 64-bit cache… This block-table offset is also formed in 32-bit arithmetic. A valid table with more thanINT_MAX… The flattened selected-index offset is computed asint. A valid large tensor whose `token_id *…CheckInputscurrently deriveshead_sizewith truncating integer division and does not verify…
Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Akshay Sonawane (apsonawane)
previously approved these changes
Oct 1, 2026
…sepagedattention Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
…sepagedattention # Conflicts: # docs/ContribOperators.md # docs/OperatorKernels.md # onnxruntime/core/graph/contrib_ops/ms_opset.h Co-authored-by: kunal-vaishnavi <115581922+kunal-vaishnavi@users.noreply.github.com>
Sayan Shaw (sayanshaw24)
approved these changes
Oct 2, 2026
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Description
Adds
com.microsoft.SparsePagedAttention, a model-neutral CUDA executor for externally selected attention indices over ORT paged KV caches.PagedAttentionwrites, block tables, slot mapping, cache aliasing, QK-Norm, RoPE, and INT8 quantization.Motivation and Context
Qwen4-Exp QSA and DeepSeek V4 CSA require sparse attention over different KV lifetimes and logical index spaces. This operator separates externally produced selection metadata from paged-cache writes and attention execution without introducing model-specific policy modes.